1. Technical Field
The present invention relates to damping of LC (inductance-capacitance) ringing effects, and more specifically, to damping of LC ringing effects in IC (Integrated Circuit) power distribution systems.
2. Related Art
In typical IC implementations, circuit activity may be characterized by sudden changes in power demand. For example, the use of clock gating in sequential circuits can suddenly induce or eliminate logic-signal switching in large circuit blocks, by activating or suppressing the application of clock signals to every flip-flop in a clock domain. Whenever the domains are turned on and off, the corresponding and abrupt change in power demand generates a system step response, characterized by an oscillating transient voltage variation across the chip power distribution system (board, package, and on-chip power grid). The response period is a strong function of the power system's inductance and capacitance, and the response phenomenon is often called “LC ringing.” The reciprocal of the voltage drop period is called the system “resonant frequency.” Owing to resistance in the power distribution network, the step response is “damped”, meaning that, over time, the amplitude of the voltage response will eventually decay to a small, steady-state value (the “AC response”). However, any subsequent and significant changes in chip power demand will re-introduce the LC ringing and the corresponding modulation of the power supply voltage. This transient “power noise” can induce functional design failures, or even degrade the reliability of the on-chip circuits. Both outcomes are undesirable.
To reduce the impact of power noise, a power distribution structure is needed which responds differently to sudden changes in power demand. Specifically, a system is needed in which the circuit voltage level, in response to power demand variation, oscillates at lower amplitudes and more quickly decays to the steady-state AC response, as compared to power distribution systems in the prior art. A method is also needed for integrating and operating such a structure in IC applications.